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UNISIM provides several virtual platforms and a framework to ease the development of new virtual platforms. A virtual platform is a software tool, often called simulator, that mimics the behavior of an electronic system so that software can run on it before silicon or FPGA implementation of that electronic system is available. The simulated electronic system can include lots of microprocessors and devices.
Depending on the needed representativeness and simulator development budget, a simulator can be as simple as an instruction set simulator as well as a full system simulator. A full system simulator, not only executes the microprocessor instruction set, like an instruction set simulator, but also simulates buses, I/O devices, sensors, actuators, so that real application workloads and operating systems can run on them. Most of UNISIM virtual platforms are full system simulators, which means that they are sufficiently representative of the real hardware that whole operating systems (e.g. Linux, VxWorks), unmodified software stacks (e.g. an AUTOSAR software stack), and industrial applications can run on them.
The UNISIM virtual platforms are modular: a simulator is the assembly of properly configured simulation components (e.g. CPU, RAM, buses). They are written in C/C++ and based on industry standards, like IEEE1666TM, OSCI SystemCTM and OSCI SystemCTM TLM 2.0.


Several open source virtual platforms for different targets (ARM, PowerPC, 68HCS12X, and TMS320C3X) and different hosts (Linux, Windows, Mac OS X) are available for download here. These virtual platforms have been evaluated and used in various industry domains such as automotive, avionic, military, electrical equipments for medium tension, nuclear safety.

Use cases

Development of SystemC IPs (intellectual property) and new virtual platforms

UNISIM is an open development environment that comprises a SystemC module library, and a set of services (debugging, program loaders, …). It can be a fundation for the development of new SystemC IPs and new virtual platforms.

Hybrid virtual platform

UNISIM/SystemC and an FPGA accelerator can be mixed to build some hybrid virtual platforms for instance simulating processor cores within UNISIM/SystemC, and prototyping specialized IPs/devices within an FPGA accelerator. Hybridization allows using indifferently both UNISIM/SystemC IPs (on a standard host machine) and VHDL IPs (on an FPGA accelerator), but also speeding up simulation of large systems.

Non-intrusive debugging and testing of software

It means that, unlike on the real hardware, software can be debugged and tested without affecting either its functional and/or temporal behavior. With such virtual instrumentation, the user can seamlessly stop and resume execution of software, profile the software, inspect the system status, inject values on the sensors, modify the state of program variables and microprocessor/device registers, and then analyze the result without modifying the software.

Hardware/software integration

The software stack can be debugged and tested within a representative hardware environment before the availability of either the FPGA prototypes or the real hardware. The software stack can be composed of low level software (e.g. drivers), of a real-time operating system, and of applications generated from high level models (Papyrus, Matlab Simulink, Rational Statemate, Stateflow, …)


UNISIM provides academia and industry with a simulation platform to ease architectural exploration and hardware/software codesign. The "UNISIM Virtual Platforms" project started around 2005 within the UNISIM simulation environment. Our goal was to enable hardware/software integration and validation on fast simulators with high level of abstraction. Hence, we started working on several virtual platforms at transaction level of modeling and a framework to ease the development of new virtual platforms. The "UNISIM Virtual Platforms" project is the visible results of these works. The UNISIM simulation environment was enhanced with a Toolbox architecture through a maturation project (“OMTE”) financed/managed by Digiteo. In this project, which took place in 2009, CEA List worked in collaboration with the ALCHEMY team involving partners from INRIA Saclay, University Paris 11 and CNRS.

About us

The "UNISIM Virtual Platforms" project is currently maintained by CEA List (Software Reliability Laboratory), member of Digiteo.

Crédit photos: P. Stroppa/CEA

CEA List institute supports industrial competitiveness through innovation and technology transfers. The institute's ability to create a perennial relationship with its industrial partners allows its researchers to understand and respond to their needs. Indeed, we're able to address specific needs of our industrial partners such as building custom virtual platforms, either within industrial/research projects or under commercial contracts. We've already built custom virtual platforms in the avionic and automotive areas within commercial contracts, while several virtual platforms have been developed within the following research projects:

Feel free to contact us for any form of collaboration at support.unisim-vp<at>

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Virtual Platforms



We would like to thank Digiteo that supported us in making the UNISIM virtual platforms available to the community.


We presented a poster at the poster sessions of the HiPEAC'12 conference, January 23-25, 2012, Paris, France. The HiPEAC conference provides a forum for experts in computer architecture, programming models, compilers, and operating systems for embedded and general-purpose systems. The conference aims at the dissemination of advanced scientific knowledge and the promotion of international contacts among scientists from academia and industry.

On-going evaluation

A UNISIM virtual platform of a Xilinx Virtex-5 FXT is being evaluated by project partners in the context of OPEES (Open Platform for the Engineering of Embedded Systems), a European project that aims to ensure long-term availability of critical / embedded systems engineering technologies to secure industry competitiveness and development.